XPU Architect
At Volantis Semiconductor, Inc. · Hybrid Remote/SF Bay Area/Austin/Boston; Remote
- Engineering
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“Hybrid Remote/SF Bay Area/Austin/Boston”
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- Posted
- 29 July 2026
- First seen by us
- 3 November 2026
- Last checked
- 8 hours ago
Job description
From Volantis Semiconductor, Inc.’s job post, as they wrote it.
What We’re Looking For:
We’re looking for an XPU Architect to own the XPU compute engine architecture of the A-0 and A-1 systems. This will initially involve heavily leveraging existing 3rd party IP, but in a creative way to solve the bandwidth demand challenges and memory system interface challenges. Future generations of the compute XPU will be semi-custom and custom designs.
Ideal Background:
An ideal candidate will have:
Read the full description
* Previous experience architecting and owning a high performance, high TDP ASIC (eg AI chips, network switch chips, high performance CPUs or similar)
* Knowledge of both computer architecture but also silicon implementation, and understanding of the realistic constraints that silicon implementation places upon architectural options
* Deep understanding of AI workloads, especially low latency LLM inference
* Understanding of workload and system level bottlenecks, especially around inference, as it pertains to interconnect, memory capacity, bandwidth, latency, etc.
Strongly Preferred:
* Hands-on experience with AI chip architecture and tapeouts
* End to end ownership of at least one AI ASIC project
* History of product delivery (regardless of ultimate commercial success of said product)
* Experience with HBM-based AI chip architecture
* Experience in proposing “weird” chip architectures (in any domain, not just AI!)
XPU ArchitectVolantis Semiconductor, Inc.
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